LV-1.0

DESIGN
CONCEPT
SPECS
OPTION
SOFTWARE
CONTACT
SPONSOR
GALLERY
MEDIA

PRIVACY POLICY










Height:
Width:
Depth:
15.3mm
72mm
47mm
-An input interface adopts the 4-wire LVDS system which aimed at the noise
 reduction effect.
-Adopt PCM1795 of Texas Instruments as a DAC chip.
-32 bits of resolution and a sampling frequency correspond to 10k-200kHz.
-Op amplifier exchange is possible for an I-V conversion part (IC socket adoption)




Input interface

I2S、4LineLVDS
D-A converter part
 
Sampling rate 10kHz to 200kHz

Resolving power

16 / 24 / 32bit

Output

Imbalance、Stereo

Control interface

SPI(used by setting / control of PCM1795)

Power supply

+5V、+/-12V

The output voltage(Gain, Sensitivity)

2.2Vrms / Full scale